（EDA）基于FPGA的远程高速采集卡说明书.doc

高速采集卡的研制 摘要 本次设计来源于输电线路实时监控系统。系统由一台主机和多个分机组成。本次设计为系统的一个分机。每个分机负责一个网点的电网的状况监测通过高速A/D转换把电网的波形数据采集下来并记录到存储器中，在收到外部触发信号时把触发前200ms和后300ms的电网波形数据以嵌入式网络服务器的模式发送到主机。我国电网标准频率为50Hz一般的系统对于5次谐波来说200K的采样率也足够了，本系统与传统的电网监测系统不同，不仅是对工频信号监测，还要对雷电波，甚至是在对电网注入行波进行检测。这些信号都是微秒级的，这就需要上兆的采样速度。本次设计的AD转换采用模拟设备公司的AD9225芯片保证较高的AD转换速度，处理器为ALTERA公司的EP3C25能提供足够多的I/O接口和逻辑单元。 关键词： 数据采集；FPGA；以太网接口；LWIP协议栈 the design of DATA GATHER based on FPGA ABSTRACT This design comes from the transmission line real-time monitoring system. System consists of a host and a number of extension component. The design of an extension for the system. Each extension of a network responsible for monitoring the status of the grid through high-speed A / D converter to the grid and record the waveform data acquisition down to memory, when receiving an external trigger signal to trigger the pre-200ms and 300ms after the power waveform data to embed mode sensor and network servers to send to the host. Standard 50Hz grid frequency of our general system for the 200K for the five harmonics of the sampling rate is sufficient, the system and the traditional network monitoring systems, not only is the frequency signal monitoring, but also of the lightning wave, even In wave power into the testing. These signals are the microsecond level, which would require trillions of sampling rate. The design of the AD converter analog Devices AD9225 chips to ensure high speed AD converter, processor ALTERA EP3C25 company can provide enough I / O interface and logic elements. Key words: data acquisition; FPGA; ethernet interface; LWIP stack 目 录 1 绪论 1 1.1 引言 1 1.2 数据采集卡的背景简介 1 1.3 国、内外发展状况 1 1.4 存在的问题 4 2 设计要求与方案论证 5 2.1 设计要求 5 2.2 总体设计方案 5 2.3 方案细节 12 2.4 本章小结 14 3 硬件设计 15 3.1 系统框图 15 3.2 前端信号调理分析 15 3.3 信号调理电路设计 17 3.4 A/D转换 19 3.5 FPGA核心电路 20 3.6 存储器电路 21 3.7 以太网接口电路 22 3.8 电源电路 23 3.9 本章小结 24 4 软件设计 25 4.1 SOPC开发流程 25 4.2 Quartus II工程设计 26 4.3 Nios II软件设计 35 5 参考文献 45 6 致谢 46 附录A 电路图 1 附录B Quartus II 电路 2 附录B PCB图 1 附录C 主要的代码 2 附录D 测试结果