数字设计原理与实践 第四版 (john F.Wakerly ) 课后答案(第八章).ppt

8.13 8.27 Design a 4-bit ripple down counter using four D flip-flops 1111 1110 1101 1100 1011 1010 1001 1000 0111 0110 0101 0100 0011 0010 0001 0000 FF0 FF1 FF2 FF3 8.35 using 74x163 to design a modulo-11 counter: 3,4,5,…,12,13 8.46 design modulo-16 counter using a 74x169 and at most a SSI package: 7,6,5,4,3,2,1,0,8,9,10,11,12,13,14,15,7,… U/D=0 Down couter:7,6,5…,0 U/D=1 Up counter: 8,9,10,…15 8.55 design an 8-bit self-correcting ring counter whose states Are11111101,using only two SSI/MSI packages 8.57 Design two different 2-bit, 4-states counters, where each design uses just a single 74x74 package. Q1Q0 8.58 Q3 Q2 Q1 Q0 Q3* Q2* Q1* Q0*(D3 D2 D1 D0) 0000 0001 0001 0011 0011 0111 0111 1111 1111 1110 1110 1100 1100 1000 1000 0000