高速信号完整性基础及抖动和眼图测试-eetop[1].cn_SI - Basic &amp2.pdf

高速信号完整性基础及抖动和眼图测试 －高速串行总线构架剖析以及测量方法概述 t ̶̵ t edge n ref n t t edge n edge n+1 日程安排 • 高速串行总线构架介绍 • 高速串行总线深入剖析 • 高速串行总线测试 2 2009-9-21 From Profound to Simple for HSSD 术语列表 • HSSD: High speed serial data • Transceiver: Transmitter & Receiver • CDR: Clock Data Recovery • Serdes: Serializer/Deserializer • FFE: Feedforward equalization • DFE: Decision feedback equalization • RJ: Random jitter • DJ: Deterministic jitter • PJ: Periodic jitter • ISI: Inter-Symbol interference • DCD: Data dependant distortion • TJ@BER: Total jitter 3 2009-9-21 From Profound to Simple for HSSD 日程安排 • 高速串行总线构架介绍 –高速串行总线发展史 • 高速串行总线深入剖析 • 高速串行总线测试 4 2009-9-21 From Profound to Simple for HSSD Moore’s Law （摩尔定律） • Moore’s Law: Silicon integration doubles every 2 years. – Application to microprocessors: Processor performance doubles every two years. • How is the performance growth achieved? – Frequency scaling: smaller, faster devices – Increased parallelism (e.g. pipelines, superscalar): more devices – Increased function (e.g. floating point, MMX): more devices • So What? Moore’s law impacts interconnect. – Higher frequency processors demand more data to keep functional units occupied doing useful work. – This means more wires operating at higher frequency. 5 2009-9-21 From Profound to Simple for HSSD 系统总线性能趋势 System Bus Frequency 10000