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本科毕业设计
外文文献及译文
文献、资料题目：TMS320C5402
文献、资料来源：
文献、资料发表（出版）日期： 院 （部）： 信息与电气工程学院
专 业：
班 级：
姓 名：
学 号：
指导教师：
翻译日期：
28 -
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外文文献
TMS320C5402
Advanced Multibus Architecture With ThreeSeparate 16-Bit Data Memory Buses and One Program Memory Bus.40-Bit Arithmetic Logic Unit (ALU),Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators 17 ??17-Bit Parallel Multiplier Coupled to a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation.Compare, Select, and Store Unit (CSSU) for the Add/Compare Selection of the Viterbi Operator.Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle.Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUData Bus With a Bus-Holder Feature.Extended Addressing Mode for 1M ?16-Bit
Maximum Addressable External Program Space.4K x 16-Bit On-Chip ROM.16K x 16-Bit Dual-Access On-Chip RAM.Single-Instruction-Repeat and Block-Repeat Operations for Program Code.Block-Memory-Move Instructions for Efficient Program and Data Management.Instructions With a 32-Bit Long Word Operand.Instructions With Two- or Three-Operand Reads.Arithmetic Instructions With Parallel Store and Parallel Load.Conditional Store Instructions Fast Return From Interrupt On-Chip Peripherals Software-Programmable Wait-StateGenerator and Programmable Bank Switching On-Chip Phase-Locked Loop (PLL) Clock Generator With Internal Oscillator or External Clock Source.Two Multichannel Buffered Serial Ports (McBSPs).Enhanced 8-Bit Parallel Host-Port Interface (HPI8).Two 16-Bit Timers,Six-Channel Direct Memory Access (DMA) Controller.Power Consumption Control With IDLE1,IDLE2, and IDLE3 Instructions With Power-Down Modes.CLKOUT Off Control to Disable CLKOUT On-Chip Scan-Based Emulation Logic,IEEE Std 1149.1? (JTAG) Boundary Scan Logic 10-ns Single-Cycle Fixed-Point InstructionExecution Time (100 MIPS) for 3.3-V Power Supply (1.8-V Core)
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